Gate-on-array is a process technology that integrates a gate driving circuit on the array substrate. An array substrate includes a display area and a peripheral area. Typically, the gate-on-array units are disposed in the peripheral area. The gate-on-array units may include a plurality of thin film transistors. The display area includes a plurality of subpixels, each of which also includes one or more thin film transistors. The thin film transistors in the display area and the peripheral area may be formed in a single patterning process, thereby saving cost and increasing efficiency.